STATUS

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Interpret as STATUS

No Description

RXENS	Receiver Enable Status
TXENS	Transmitter Enable Status
MASTER	SPI Main Mode
RXBLOCK	Block Incoming Data
TXTRI	Transmitter Tristated
TXC	TX Complete
TXBL	TX Buffer Level
RXDATAV	RX Data Valid
RXFULL	RX FIFO Full
TXBDRIGHT	TX Buffer Expects Double Right Data
TXBSRIGHT	TX Buffer Expects Single Right Data
RXDATAVRIGHT	RX Data Right
RXFULLRIGHT	RX Full of Right Data
TXIDLE	TX Idle
TIMERRESTARTED	The USART Timer restarted itself
TXBUFCNT	TX Buffer Count

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